Verilog / VHDL Jobs

5 were found based on your criteria

  • Fixed-Price – Est. Budget: $50.00 Posted
    need to design a 16 bit pre-computation based content addressable memory using gate block selection algorithm.if you are ready to do the job and it has to be done in 3-4 hours.i can take care of the test bench.i need the verily code working properly and i can give complete details of the gate block selection algorithm.
  • Fixed-Price – Est. Budget: $1,000.00 Posted
    Want to share your experience using VLSI/Verilog with people that want to learn it? If you can make screen capture video tutorials showing how to use these topics from the basics to the advanced skills, you will love making an ONLINE COURSE with me! All you have to do is screen capture yourself using these programs and explaining what you already know how to do with it! Here are the basic project goals. 1) 20 to 50 screen capture ...
  • Hourly – More than 6 months – Less than 10 hrs/week – Posted
    We need contractors who understand how to refactor software code to run efficiently in FPGA. The original code is typically in OpenCL or C. The tools we use are Impulse C, OpenCL and HLS tools made by the FPGA manufacturers. We need patient, persistent, experienced coders who can work with these software designs so that they efficiently machine compile into FPGA. We work with all brands of FPGA including Altera, Xilinx, Lattice and MicroSemi. Some VHDL coding is typically also ...