1 to 3 months –
10-30 hrs/week –
We are looking for someone who has worked with the Xilinx PCIe Endpoint Block before.
(We will be using Virtex5, but experience with other variants will be fine)
We need you to provide us with an example design for basic PCIe functionality and help us with implementing a project.
If you have the software setup to simulate the endpoint block and the gigabit transceivers this is a plus but not a requirement.
To be considered for this job please explain ...